Filter amplifier



g- 24, 1965 TAKEO MATSUZAKI ETAL 3,

FILTER AMPLIFIER Filed March 22, 1961 3 SheetsSheet l Inventor Atlorney g 1965 TAKEO MATSUZAKI ETAL 3,202,925

FILTER AMPLIFIER Filed March 22, 1961 3 Sheets-Sheet 2 Inventor By WM A Horney Aug. 24, 1965 TAKEO MATSUZAKI ETAL 3,202,925

FILTER AMPLIFIER Filed March 22, 196] 5 Sheets-Sheet 3 {-0 i C 2 77 III III H Q r) Inventor A tlorney United States Patent O 3,202,925 PETER AWLIFIER Taken Matsuzaki and Hitoshi Watanabe, Tokyo, Japan, assignors to Nippon Electric Company, Limited, Tokyo, Japan, a corporation of Japan Filed Mar. 22, 1961, Ser. No. 97,484 Claims priority, application Japan, Mar. 25, 1960,

SIS/16,084 '3 Claims. (Cl. 330-31) This invention relates to a filter amplifier composed of a combination of a constant impedance type network and a transistor circuit.

It is known to provide four-terminal filters of the constant impedance type (in specific hands) by the interconnection of two-terminal reactive impedances. Such filters result in a certain amount of attenuation of energy because of either the resistances or those resistances intentionally added.

It is an object of this invention to provide filters with simplified structures of the above type which are substantially lossless with respect to the signal energy. This is accomplished by connecting transistors in the network so that the gain in the transistors will compensate for resistance losses.

The above-mentioned and other features and objects of this invention and the manner of attaining them will become more apparent and the invention itself will be best understood by reference to the following description of an embodiment of the invention taken in conjunction with the accompanying drawings, in which:

FIGS. 1 (a) to (h) inclusive are circuit diagrams to explain the principles of this invention. FIG. 2 and FIG. 3 are the construction diagrams of some embodiments of this invention.

Among FIGS. 1 (a) to (h) inclusive, which are circuit diagrams for explaining the principles of a filter amplifier of this invention, FIG. 1 (a) shows a four-terminal voltage network composed of two-terminal constant impedance circuit type network in which two resistances r and r are connected parallel to two reactive impedances then, the input impedance Z becomes as follows:

Therefore, if the source voltage E is applied to this network, the output voltages V and V across the terminals of the resistances r and r become, respectively, as folinasmuch as Z Z :r Finding the difference of the two outputs V and V 32%,925 Patented Aug. 24, 1965 Since |Z Z -|-r I is equal to l, the difference V V is of a constant amplitude. This relation is the same asthe relation of the wellknown two terminal constant impedance network. If Z :Z and r zr zr, then the imput impedance Z is as follows:

This means that the output becomes zero.

Thus, the Equations 2 and 4 indicate that the same design theory holds as that of the lattice-type network where if the series and the lattice element impedances Z and Z are so chosen that they nearly satisfy the relations Z Z =r and therefore the network.

Referring to FIG. 1(b) wherein a two-terminal con- Thus, as in the case shown by Equation 3, an output of a constant amplitude is obtained.

If z =z and r =r =r, then the impedance Z and the difference V V as as follows:

Thus, the Equations 6 to 9 are obtained, which holds the same relations as the Equations 2 to 5 and thus also make it possible to design a voltage filter. -As has been described, the design Equations 2, 3 or 6, 7 for four-terminal networks of FIGS. 1(a) and (b) which are derived from v.9 the two-terminal constant impedance type network containing resistances, are the conditions for the transmission band in designing a filter of the lattice-type network having the elements Z and Z while the Equations 4, 5 or 8, 9 are the conditions for the damping band. By choosing the elements Z and Z so as to satisfy both of these conditions the required band filter is obtained. The design of the elements Z and Z which satisfy the Equation 10 is the same as Cauers lattice-type filter design theory, and the well-known design table is already published. Since, however, two sets of elements Z and Z are generally required in realizing a lattice-type circuit, the circuit is usually transformed into a ladder-type circuit which decreases the number of elements by half although it generally requires mutual inductance or an ideal transformer. Rieggers or Jaumanns transformation is an example of the latter. A detailed description of the Cauer type filter appears in the publication entitled Synthesis Linear Communication Network, written by W. Caner and published by the McGraw Hill Book Company, 1958, pages 111-112. The Jaumann and Riegger type filters are described on page 370 of said publication.

Since, in this invention, a filter is realized with only a set of elements Z and Z of Cauers design theory itself and with only two additional resistance elements rs, it is very economical. However, the network of FIG. 1(a) or (b) as it is, is nothing but a voltage filter whose output terminals are open. There are losses in transmission due to the resistance effects.

This invention intends to realize a lossless filter by making the resistances r included in the constant of a transistor circuit.

Now referring to the network of FIG. 1(c) wherein the impedance Z and the resistance r of FIG. 1(b) are interchanged, the input impedance Z is the same as that of FIG. 1(b), but the output voltage V -V is different therefrom and is as follows:

Thus, if 2 :2 only the output voltage changes and is expressed in term of that impedance Z as shown in the Equation 11. It will be understood from this fact that the transmission loss varies with the frequency and that the network of FIG. 1 (c) is a constant resistance damping equalizer whose input impedance is given by Z:r.

From the networks of FIG. 1 (a) and (b), four-terminal voltage filters of Riegger type shown in FIG. 1 (d) and (e) and those of Jaumann type shown in FIG. 1 g) and (h) are also obtained by using a transformer T. FIG. 1 (f) is a network which is similar to that of FIG. 1 (b) and in which the output terminals are from the midpoints of the impedances and the resistances. Here, the resistances F and r are so chosen that r =r :r, and the impedances Z and Z are so chosen that Z1Z2 r in the transmission band and Z :Z in the damping band. In the networks shown in FIGS. 1 (d)(h), if

or so, they become equivalent to the well-known Riegger or the Jaurnann circuit.

According to this invention, a filter amplifier is provided' based upon the above principles, in whose gain, the losses of the voltage filter are compensated by substituting the effective resistances of the transistor base or emitter for the above-mentioned resistances r zr zl.

FIG. 2 shows construction diagrams obtained by applying this invention to the network of FIG. 1 (a). In FIG. 2 (a), similar N type transistors T and T are used in a grounded emitter type amplifier. Let the resistance of the base, of the emitter, and of the collector be r r and r respectively, then the input impedances of the transistors T and T for emitter grounding and for base grounding, respectively, are as follows:

For emitter grounding,

or 0: is a current gain for base grounding (I a collector current, and 1 an emitter current).

In FIG. 2 (a), for example, transistors T and T and adjustable resistances r, and r are used instead of the resistances r and r of the network shown in FIG. 1 (a). By adjusting one or the other of the adjustable resistances r and r so that the following equations are satisfied:

and by letting the irnpedances Z and Z satisfy the Equations 2 and 4 or 6 and 8, then it is obvious that the filter amplifier mentioned above can be designed. Here, the adjustable resistances, r r may be inserted either on the base side or on the emitter side. It is only necessary to adjust one of them so as to satisfy the Equation 13. By utilizing the difference of the amplified output of the transistors T and T the filter base on the principle of FIG. 1 (a) can consequently be designed.

FIG. 2 (b) and FIG. 2 (c) show filter amplifiers of this invention, wherein and N type and a P type grounded emitter amplifier are used and wherein two N type grounded base amplifiers are used respectively. The resistances r and r of FIG. 2 (c) are so-chosen as to satisfy the Equation 13. In FIG. 2 (d), only one transistor T is used, and the output of the resistance connected in parallel to the impedance Z is taken out directly, only a voltage applied to the resistance comprising the input resistance of the transistor T being amplified.

In FIG. 3 which shows Iaumann type embodiments of this invention, (a) shows a circuit in which two transistors T and T are used in emitter ground type and the difierence of the outputs of the transistors T and T is taken out by a transformer T; (b) and (c) show circuits wherein two N type transistors are used and wherein an N type and a P type transistor are used respectively; (d) and (2) show circuits in which only one transistor T is. used and the output of the resistance connected in series to the impedance Z is directly taken out, only a voltage applied to the resistance comprising the input resistance of the transistor T being amplified. The circuit of FIG. 3 (f) is a damping equalizer as given by the Equation 11, where the outputs of the transistors T and T are taken as shown in FIG. 1 (c).

As explained above in detail, it is necessary in order to apply this invention generally, that the input admittance Y (or impedance Z and the transmission admittance Y (or impedance Z of the resultant admittance (or resultant impedance) of the four-terminal network; in which two sets of two-terminal admittances Y and Y (or impedances Z and Z and conductances g :g :g (or resistances i' zl zl) are connected as in FIG. 1 (a) or (b), namely,

1 1 Y 1+Y1+1+Y2 as standardized according to the relation g zg zl (in case of an impedance system, r :r :1 and YeZ); be so chosen that |Y [:[Y [:l in the transmission region and Y in the attenuation band. Conversely, solving the Equation 14 for Y Y the following results are obtained.

This means that, in the transmission band, approximately Y Y zl; and in the attenuation band approximately Y1IY2. functions of complex variables, Y and Y are also realized by functions of complex variable. real parts of the admittances Y and Y are negative, if

In general, if the admittances Y and Y are Even if the Again, even if either of the admit- We claim:

1. A four terminal filter amplifier comprising:

(A) a pair of input terminals;

(B) first and second networks connected in series to said input terminals, at least one of the networks including a transistor,

(1) said first network comprising first impedance and resistance means connected in a first parallel circuit,

(2) said second network comprising second impedance and resistance means connected in a second parallel circuit,

(3) said parallel circuit being connected to each other in series across said input terminals,

(4) the impedances and resistances of said first and second impedance and resistance means satisfying the relation in the pass-band of said filter amplifier that the product of resistances is substantially equal to the product of impedances, and in the attenuation band of said filter amplifier that the impedances of the impedances means are substantially equal,

(5) at least one of said resistance means comprising the input resistance appearing between the base and emitter electrodes of said transistor,

(C) means for deriving an output voltage substantially proportional to the difierence between the voltage which appears across said first and second resistance means respectively,

(1) at least one of said voltages including the output voltage appearing across the emitter and collector electrodes of said transistor;

(D) and a pair of output terminals connected to said deriving means.

2. A four terminal filter amplifier comprising:

(A) a pair of input terminals;

(B) first and second networks connected in parallel across to said input terminals, at least one of said networks including a transistor;

(1) said first network comprising first impedance and resistance means connected in series,

(2) said second two-terminal network comprising second impedance and resistance means connected in series,

(3) the impedances and resistances of said first and second impedance and resistance means satisfying the relation in the pass-band of said filter amplifier that the product of resistances is substantially equal to the product of impedances, and in the attenuation band of said filter amplifier that the impedances of the imepdance means are substantially equal,

(4) at least one of said resistance means comprising the input resistance appearing between the base and emitter electrodes of said transistor,

(C) means for deriving an output voltage substantially proportional to the difference between the voltages which appear across the first and second resistance means, respectively,

(1) at least one of said voltages including the output voltage appearing across the emitter and collector electrodes of said transistor;

(D) and a pair of output terminals connected to said deriving means.

3. A four terminal filter amplifier comprising:

(A) a pair of input terminals;

(B) first and second networks connected in parallel to said input terminals, at least one of said networks including a transistor,

(1) said first network comprising first impedance and resistance means connected in series,

(2) said second network comprising second impedance and resistance means connected in series,

(3) the impedance and resistance of said first and second impedance means and resistance means satifying the relation in the attenuation band of said filter amplifier that the product of resistance is substantially equal to the product of impedances, and in the pass-band of said filter amplifier that the impedances of the impedance means are substantially equal,

(4) at least one of said resistance means comprising the input resistance appearing between the base and emitter electrodes of said transistor; (C) means for deriving an output voltage substantially proportional to the difference between the voltages which appear across one of said first and second impedance means and one of said first and second resistance means,

(1) at least one of said voltages including the output voltage appearing across the emitter and collector electrodes of said transistor.

(D) and a pair of output terminals connected to said deriving means.

References Cited by the Examiner UNITED STATES PATENTS 8/29 Zobel 333-- 8/30 Affel 333-70 5/34 Cauer 33370 4/57 Linwill 333 3/60 McLean 333-430 4/60 Kuraruwala 333-80 7/62 Sandberg 33380 12/62 De Monte et al 33380 65 HERMAN KARL SAALBACH, Primary Examiner.

BENNETT G. MILLER, Examiner. 

1. A FOUR TERMINAL FILTER AMPLIFIER COMPRISING: (A) A PAIR OF INPUT TERMINALS; (B) FIRST AND SECOND NETWORKS CONNECTED IN SERIES TO SAID INPUT TERMINALS, AT LEAST ONE OF THE NETWORKS INCLUDING A TRANSISTOR, (1) SAID FIRST NETWORK COMPRISING FIRST IMPEDANCE AND RESISTANCE MEANS CONNECTED IN A FIRST PARALLEL CIRCUIT, (2) SAID SECOND NETWORK COMPRISING SECOND IMPEDANCE AND RESISTANCE MEANS CONNECTED IN A SECOND PARALLEL CIRCUIT, (3) SAID PARALLEL CIRCUIT BEING CONNECTED TO EACH OTHER IN SERIES ACROSS SAID INPUT TERMINALS, (4) THE IMPEDANCES AND RESISTANCE OF SAID FIRST AND SECOND IMPEDANCE AND RESISTANCE MEANS SATISFYING THE RELATION IN THE PASS-BAND OF SAID FILTER AMPLIFIER THAT THE PRODUCE OF RESISTANCES IS SUBSTANTIALLY EQUAL TO THE PRODUCT OF IMPEDANCES, AND IN THE ATTENUATION BAND OF SIAD FILTER AMPLIFIER THAT THE IMPEDANCES OF THE IMPEDANCES MEANS ARE SUBSTANTIALLY EQUAL, (5) AT LEAST ONE OF SAID RESISTANCE MEANS COMPRISING THE INPUT RESISTANCE APPEARING BETWEEN THE BASE AND EMITTER ELECTRODES OF SAID TRANSSITOR, (C) MEANS FOR DERIVING AN OUTPUT VOLTAVE SUBSTANTIALLY PROPORTIONAL TO THE DIFFERENCE BETWEEN THE VOLTAGE WHICH APPEARS ACROSS SAID FIRST AND SECOND RESISTANCE MEANS RESPECTIVELY, (1) AT LEAST ONE OF SAID VOLTAGES INCLUDING THE OUTPUT VOLTAGE APPEARING ACROSS THE EMITTER AND COLLECTOR ELECTRODES OF SAID TRANSISTOR; (D) AND A PAIR OF OUTPUT TERMINALS CONNECTED TO SAID DERIVING MEANS. 